Blockchain Papers

Akshay Kulkarni, Noor Ahmad Hazari, Mohammed Niamat

Globalization of integrated circuits (ICs) may lead to the quality of ICs being compromised due to the possible untrusted entities involved in the supply chain. There have been well documented cases of chips secretly implanted with Trojans creeping into the supply chain. Studies have shown that tampering lithographic masks, also called as reticles, is one of the potential sources of hardware Trojan intrusion. This paper presents a novel blockchain-enabled mask writing technique to combat the alteration of the IC layout design at the mask making step. A blockchain-enabled file storage and transfer system for secure transfer of the layout GDSII file from the design house to the mask making machine is studied in this work. As part of this investigation, a smart contract is developed, which interacts with an external application programming interface (API) and fetches the design layout file from the file storage system. The smart contract developed as part of the research can be adopted in the existing EDA tools for mask making, curtailing the access sought by an adversary in the mask making process. The proposed smart contract is developed using Solidity language, on an online IDE called Remix. Finally, a case study is presented in this paper, validating the approach and simulating the proposed smart contract. The simulation of the smart contract is conducted on Goerli test network provided by Ethereum.

Devika Kalathil Nandalal, Ramesh Bhakthavatchalu

Globalization of the chip design and manufacturing industry has imposed significant threats to the hardware security of integrated circuits (ICs). It has made ICs more susceptible to various hardware attacks. Blockchain provides a trustworthy and distributed platform to store immutable records related to the evidence of intellectual property (IP) creation, authentication of provenance, and confidential data storage. However, blockchain encounters major security challenges due to its decentralized nature of ledgers that contain sensitive data. The research objective is to design a dedicated programmable hardware security modules scheme to safeguard and maintain sensitive information contained in the blockchain networks in the context of the IC supply chain. Thus, the blockchain framework could rely on the proposed hardware security modules and separate the entire cryptographic operations within the system as stand-alone hardware units. This work put forth a novel approach that could be considered and utilized to enhance blockchain security in real-time. The critical cryptographic components in blockchain secure hash algorithm-256 (SHA-256) and the elliptic curve digital signature algorithm are designed as separate entities to enhance the security of the blockchain framework. Physical unclonable functions are adopted to perform authentication of transactions in the blockchain. Relative comparison of designed modules with existing works clearly depicts the upper hand of the former in terms of performance parameters.

Tao Zhang, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi

Field-programmable gate array (FPGA) bitstream reverse engineering and counterfeiting is a pertinent challenge in the modern hardware supply chain. To this end, this article proposes a blockchain-based technology to foster authenticity and integrity of the FPGA supply chain for trustworthy traceability. The proposed approach is transformative in being able to detect counterfeit FPGA chips and bitstreams using state-of-the-art blockchain technologies.—Kanad Basu, The University of Texas at Dallas

Dimitris Mouris, Charles Gouert, Nektarios Georgios Tsoutsos

As integrated circuit (IC) design and manufacturing have become highly globalized, hardware security risks become more prominent as malicious parties can exploit multiple stages of the supply chain for profit. Two potential targets in this chain are third-party intellectual property (3PIP) vendors and their customers. Untrusted parties can insert hardware Trojans into 3PIP circuit designs that can both alter device functionalities when triggered or create a side channel to leak sensitive information such as cryptographic keys. To mitigate this risk, the absence of Trojans in 3PIP designs should be verified before integration, imposing a major challenge for vendors who have to argue their IPs are safe to use, while also maintaining the privacy of their designs before ownership is transferred. To achieve this goal, in this work we employ modern cryptographic protocols for zero-knowledge proofs and enable 3PIP vendors prove an IP design is free of Trojan triggers without disclosing the corresponding netlist. Our approach uses a specialized circuit compiler that transforms arbitrary netlists into a zero-knowledge-friendly format, and introduces a versatile Trojan detection module that maintains the privacy of the actual netlist.

Chandan Kumar, Urbi Chatterjee, Debdeep Mukhopadhayay

Physically Unclonable Functions (PUFs) primitives and blockchain technologies, also known as PUFchain, are recently taking huge attention to integrate the security parameters in Supply Chain Management (SCM) system. In this work, we devise a technique to interface an electronic chip and a blockchain platform by providing access to a unique hardware fingerprint and the stored information of chips on blockchain at one single point. To the best of our knowledge, this is the only scalable and automated technique that has been successfully implemented to authenticate the hardware device at any stage of the supply chain management system. The technique realises the concept of embedded PUF instance and the smart contract deployment on the ethereum blockchain. In the proposed technique, we have highly reduced the cost of implementing the interaction by storing the CRP on a distributed file system called as InterPlanetary File System (IPFS). Further, we implement and analyse the interfacing for ‘IC traceability’ to ensure the current ownership of a product, its point of origin, and ownership history in the SCM system. We employ Nexys 4 DDR Artix-7 FPGA board and go-ethereum blockchain library for implementing “IC traceability” to demonstrate the workflow and overhead involved in our interfacing technique.

Jason Vosatka, Andrew Stern, Muhammad Monir Hossain, Fahim Rahman · 8 authors

The modern electronics supply chain is a globalized marketplace with the increasing threat of counterfeit integrated circuits (ICs) being installed into mission critical systems. A number of methods for detecting counterfeit ICs exist; however, effective test and evaluation (T&E) methods to assess the confidence of detecting recycled ICs are needed. Additionally, methods for the trustworthy tracking of recycled ICs in the supply chain are also needed. In this work, we propose a novel methodology to address the detection and tracking of recycled ICs at each stage of the electronics supply chain. We present a case study demonstrating our assessment model to calculate the confidence levels of authentic and recycled ICs, and to confidently track these types of ICs throughout the electronics supply chain.

Dimitris Mouris, Nektarios Georgios Tsoutsos

The contemporary IC supply chain depends heavily on third-party intellectual property (3PIP) that is integrated to in-house designs. As the correctness of such 3PIPs should be verified before integration, one important challenge for 3PIP vendors is proving the functionality of their designs while protecting the privacy of circuit implementations. In this work, we present Pythia that employs zero-knowledge proofs to enable vendors convince integrators about the functionality of a circuit without disclosing its netlist. Pythia automatically encodes netlists into zero knowledge-friendly format, evaluates them on different inputs, and proves correctness of outputs. We evaluate Pythia using the ISCAS'85 benchmark suite.

Prada Delgado, Miguel Ángel

Among all the different research lines related to hardware security, there is a particular topic that strikingly attracts attention. That topic is the research regarding the so-called Physical Unclonable Functions (PUF). The PUFs, as can be seen throughout the Thesis, present the novel idea of connecting digital values uniquely to a physical entity, just as human biometrics does, but with electronic devices. This beautiful idea is not free of obstacles, and is the core of this Thesis. It is studied from different angles in order to better understand, in particular, SRAM PUFs, and to be able to integrate them into complex systems that expand their potential. During Chapter 1, the PUFs, their properties and their main characteristics are defined. In addition, the different types of PUFs, and their main applications in the field of security are also summarized. Once we know what a PUF is, and the types of them we can find, throughout Chapter 2 an exhaustive analysis of the SRAM PUFs is carried out, given the wide availability of SRAMs today in most electronic circuits (which dramatically reduces the cost of deploying any solution). An algorithm is proposed to improve the characteristics of SRAM PUFs, both to generate identifiers and to generate random numbers, simultaneously. The results of this Chapter demonstrates the feasibility of implementing the algorithm, so in the following Chapters it is explored its integration in both hardware and software systems. In Chapter 3 the hardware design and integration of the algorithm introduced in Chapter 2 is described. The design is presented together with some examples of use that demonstrate the possible practical realizations in VLSI designs. In an analogous way, in Chapter 4 the software design and integration of the algorithm introduced in Chapter 2 is described. The design is presented together with some examples of use that demonstrate the possible practical realizations in low-power IoT devices. The algorithm is also described as part of a secure firmware update protocol that has been designed to be resistant to most current attacks, ensuring the integrity and trustworthiness of the updated firmware.In Chapter 5, following the integration of PUF-based solutions into protocols, PUFs are used as part of an authentication protocol that uses zero-knowledge proofs. The cryptographic protocol is a Lattice-based post-quantum protocol that guarantees the integrity and anonymity of the identity generated by the PUF. This type of architecture prevents any type of impersonation or virtual copy of the PUF, since this is unknown and never leaves the device. Specifically, this type of design has been carried out with the aim of having traceability of identities without ever knowing the identity behind, which is very interesting for blockchain technologies. Finally, in Chapter 6 a new type of PUF, named as BPUF (Behavioral and Physical Unclonable Function), is proposed and analyzed according to the definitions given in Chapter 1. This new type of PUF significantly changes the metrics and concepts to which we were used to in previous Chapters. A new multi-modal authentication protocol is presented in this Chapter, taking advantage of the challenge-response tuples of BPUFs. An example of BPUFs is illustrated with SRAMs. A proposal to integrate the BPUFs described in Chapter 6 into the protocol of Chapter 5, as well as the final remarks of the Thesis, can be found in Chapter 7.

Krishnendu Guha, Debasri Saha, Amlan Chakrabarti

A key challenge of the embedded era is to ensure trust in reuse of intellectual properties (IPs), which facilitates reduction of design cost and meeting of stringent marketing deadlines. Determining source of the IPs or their authenticity is a key metric to facilitate safe reuse of IPs. Though physical unclonable functions solves this problem for application specific integrated circuit (ASIC) IPs, authentication strategies for reconfigurable IPs (RIPs) or IPs of reconfigurable hardware platforms like field programmable gate arrays (FPGAs) are still in their infancy. Existing authentication techniques for RIPs that relies on verification of proof of authentication (PoA) mark embedded in the RIP by the RIP producers, leak useful clues about the PoA mark. This results in replication and implantation of the PoA mark in fake RIPs. This not only causes loss to authorized second hand RIP users, but also poses risk to the reputation of the RIP producers. We propose a zero knowledge authentication strategy for safe reusing of RIPs. The PoA of an RIP producer is kept secret and verification is carried out based on traversal times from the initial point to several intermediate points of the embedded PoA when the RIPs configure an FPGA. Such delays are user specific and cannot be replicated as these depend on intrinsic properties of the base semiconductor material of the FPGA, which is unique and never same as that of another FPGA. Experimental results validate our proposed mechanism. High strength even for low overhead ISCAS benchmarks, considered as PoA for experimentation depict the prospects of our proposed methodology.

Xiaolin Xu, Fahim Rahman, Bicky Shakya, Apostol Vassilev · 6 authors

Electronic systems are ubiquitous today, playing an irreplaceable role in our personal lives as well as in critical infrastructures such as power grid, satellite communication, and public transportation. In the past few decades, the security of software running on these systems has received significant attention. However, hardware has been assumed to be trustworthy and reliable "by default" without really analyzing the vulnerabilities in the electronics supply chain. With the rapid globalization of the semiconductor industry, it has become challenging to ensure the integrity and security of hardware. In this paper, we discuss the integrity concerns associated with a globalized electronics supply chain. More specifically, we divide the supply chain into six distinct entities: IP owner/foundry (OCM), distributor, assembler, integrator, end user, and electronics recycler, and analyze the vulnerabilities and threats associated with each stage. To address the concerns of the supply chain integrity, we propose a blockchain-based certificate authority framework that can be used to manage critical chip information such as electronic chip identification (ECID), chip grade, transaction time, etc. The decentralized nature of the proposed framework can mitigate most threats of the electronics supply chain, such as recycling, remarking, cloning, and overproduction.

Md Nazmul Islam, Sandip Kundu

Globalization of IC supply chain has increased the risk of counterfeit, tampered, and re-packaged chips in the market. Counterfeit electronics poses a security risk in safety critical applications like avionics, SCADA systems, and defense. It also affects the reputation of legitimate suppliers and causes financial losses. Hence, it becomes necessary to develop traceability solutions to ensure the integrity of supply chain, from the time of fabrication to the end of product-life, which allows a customer to verify the provenance of a device or a system. In this article, we present an IC traceability solution based on blockchain. A blockchain is a public immutable database that maintains a continuously growing list of data records secured from tampering and revision. Over the lifetime of an IC, all ownership transfer information is recorded and archived in a blockchain. This safe, verifiable method prevents any party from altering or challenging the legitimacy of the information being exchanged. However, a chain of sales record is not enough to ensure provenance of an IC. There is a need for clone-proof method for securely binding the identity of an IC to the blockchain information. In this article, we propose a method of IC supply chain traceability via blockchain pegged to embedded physically unclonable function (PUF). The blockchain provides ownership transfer record, while the PUF provides unique identification for an IC allowing it to be linked uniquely to a blockchain. Our proposed solution automates hardware and software protocols using blockchain-powered Smart Contract that allows supply chain participants to authenticate, track, trace, analyze, and provision chips throughout their entire life cycle.

Md Nazmul Islam, Vinay C Patii, Sandip Kundu

Traceability of ICs is important for verifying provenance. We present a novel IC traceability scheme based on blockchain. A blockchain is an immutable public record that maintains a continuously-growing list of data records secured from tampering and revision. In the proposed scheme, IC ownership transfer information is recorded and archived in a blockchain. This safe, verifiable method prevents any party from altering or challenging the legitimacy of the information being exchanged. However, we also need to establish correspondence between a record in a public database and the physical device, in an unclonable way. We propose an embedded physically unclonable function (PUF) to establish this correspondence The blockchain ensures the legitimacy of an IC's current owner, while the PUF safeguards against IC counterfeiting and tampering. Our proposed solution combines hardware and software protocols to let supply chain participants authenticate, track, trace, analyze, and provision chips during their entire life cycle.

Apurva Dargar

The security of electronic devices is of crucial importance to companies as well as to users.Moreover, companies that develop Intellectual Property also want to protect them from counterfeiting and overbuilding.Company profits, brand reputations and personal information of the users are at stake if there is a breach in the security of these electronic devices.In the classical approach, a system is secured by storing the cryptographic keys permanently in the non-volatile memories that are present in the security devices.However, this permanent storage of the key makes them easy targets for physical attacks; hence compromising the security of the system.A more secure, cost-effective and elegant solution to this permanent key storage is the use of Physical Unclonable Functions (PUFs).PUF is a method of producing a signature from a physical object, such as an Integrated Circuit, by relying on the non-reproducible physical attributes of a device.These signatures are unique because fabricated circuits exhibit slightly different electrical behavior from one another even if their design, mask and manufacturing process are identical.Various kinds of PUFs exist; examples are Optical PUF, Butterfly PUF and SRAM PUF.However, the start-up value based SRAM PUFs appear to be the most promising ones for usage in ICs.Although the SRAM PUFs are becoming very popular, only a little has been published in the field of modeling and analysis of their start-up behavior.Reproducing the same start-up behavior, every time the chip is powered-on, is very crucial in order to produce the same cryptographic key.This thesis proposes an analytical model for the start-up value based SRAM PUFs; it helps in understanding the impact of both non-technological parameters (such as supply voltage and temperature) as well as technological parameters (such as the geometry of the transistors and threshold voltage) on the behavior of the start-up values of an SRAM.Various experiments have been performed to analyze and quantify their impact.The results obtained indicate a major impact of the non-technology parameters.The reproducibility of start-up values becomes more likely with slower ramp-ups and lower temperatures.For example, the percentage of reproducible bits increase from 93.5% at 1s ramp-up to 96% at 10ms ramp-up.Amongst the technology parameters, it is observed that a small mismatch of 1.6% in the threshold voltage is enough to flip the start-up value of the cell for 65nm technology.These results have been validated by comparing them with actual silicon data measured at Intrinsic ID.The validation of the results proves the correctness of the analytical model proposed and gives a proof of robustness of the start-up values. Modeling SRAM Start-up Characteristics ForPhysical Unclonable Functions