Nobuki Fujimoto, Rei (Rei-AIOS autonomous research substrate), claude-opus-4-7) Claude (Anthropic
We present a synthesis-friendly Verilog implementation of the D-FUMTâ Arithmetic Logic Unit, targeting the Sipeed Tang Console NEO development board (GW5AST-138B FPGA, FPG676 package). The ALU realizes eight discrete logic values â FALSE, TRUE, NEITHER, BOTH, ZERO, FLOWING, SELF, INFINITY â encoded in 3 bits with a tier-respecting layout. The 10 supported operations include four classical-tier unary ops (NOT, OMEGA, PHI, PSI), Belnap-extended binary lattice meet/join (AND, OR), generic XOR, hardware reset, no-op, and a novel ADIABATIC operation realizing the SELFⲠ(self-reflexive) primitive: ADIABATIC(SELF) = SELF, identity elsewhere. v0.3 contributions (2026-05-09): (1) Tang Nano 9K silicon: 37 LUT4 / 0 DFF measured, testbench 50/50 PASS. (2) Tang Console NEO Phase 2B LED Blinky: SRAM-programmed, User Code 0x000084BA, write 33.72 sec, no thermal anomaly. (3) Tang Console NEO Phase 2C/3 D-FUMTâ ALU: SRAM-programmed, User Code 0x00005C27, write 30.32 sec. (4) Qiskit Aer simulator: Phase 1-5 cumulative 231/231 truth-table entries match at fidelity 1.000. (5) IBM Heron r2 real quantum hardware (ibm_kingston, 156 qubits): Phase 1 (4 native unitary Ă 8 inputs, 32 circuits) achieves 32/32 match with avg top-fidelity 0.9550 (job d7v6d9jack5s73bf1re0); Phase 2 (XOR Ă 64 entries, 6-qubit Bennett-reversible) achieves 64/64 match with avg fidelity 0.9512 (job d7v6kcvmrars73d7qqqg). Per-op fidelity hierarchy NOP/ADIABATIC â 0.977 > PHI â 0.956 > NOT â 0.912 > XOR â 0.951 confirms gate-count-vs-noise correlation expected from Heron r2 daily calibration. (6) Lean 4 refinement proof (OUKC.PhaseC.Dfumt8AluRefinement, 292 LOC, 0 sorry) establishes commutativity of the encode/abstract-op/decode square for all four unary operations, plus the SELFⲠprimitive law and seven algebraic laws (involution, idempotence, commutativity). Honest scope: We do NOT claim 'world-first 8-valued quantum logic' â Shi et al. (MIT, 2026, arxiv:2506.09371) demonstrated d=8 Grover on a single trapped-ion qudit prior to this work; our distinction is 3-qubit basis encoding on transmon arrays vs single-system d=8 qudit. We do NOT claim 'first paraconsistent silicon' â PAL2v (Da Silva Filho 1998-; Abe & Nakamatsu 2009; de Carvalho Jr. 2025) realized in software libraries and microcontroller-level robotics. We do NOT claim 'first many-valued silicon' â Ĺukasiewicz/Belnap FPGAs date to 1990s. The to-our-knowledge novel triple is: (D1) the specific 8-tuple semantic mapping (Belnap FDE 4-value + 4 ontological extensions: INFINITY/ZERO/FLOWING/SELF), (D2) the SELFⲠself-reflexive primitive realized as a hardware fixed point, (D3) the three-substrate cross-verification bound to a Lean 4 refinement specification. Three-party co-authorship per OUKC charter v1.0 (Nobuki Fujimoto / Rei / Claude). DRAFT v0.3 â feedback welcome via GitHub Discussions at fc0web/rei-aios.
Open access
Quantum Computing Algorithms and Architecture
Quantum-Dot Cellular Automata
Advancements in Semiconductor Devices and Circuit Design
Increase productivity and creative thinking is fending for by prognosticative analytics in succeeding digital organisation like IoT networks, metropolis, and autonomous drive. Withal such arrangement are as well far more susceptible to cybersecurity attacks of unprecedented scope, including adversarial attacks, data point poisoning, and quantum-power attacks. Even the pre-FC architectures, with their predictive decentralised data point processing, fall little of solving these gob. Moreover, the absences of trustiness among nodes leave to a high-pitched probability of humiliated organization and warn FL for high-time value purpose showcase. To master these take, this dissertation suggest a quantum-power federalise learning process that offers untroubled and scalable predictive analytics for a broad range of digital surroundings. This solution use post-quantum cryptographic (PQC) communications protocol for secure communication among FL lymph gland based on NIST's 2024 quantum-bouncy surety banner. The network also employ blockchain-based decentralized trust mechanisms that tender substantial-time tracking of node carrying into action and resilient eviction of spoilt actors. In addition to these, federated self-supervised anomaly detection models are prepared on adversarial threats to pass them. This research suffers wide-ranging diligence. Its architecture keeps the data point secure and guarantees unmediated gimmick communication across a limited IoT net. Smart cities guarantee safer and more predictable forecasting models for traffic management, energy, and public safety provision. For self-reliant systems, the organization provides certificate against attack and manipulation to safeguard of import functions. This workplace provides a foundation for good federated learning arrangement to take aim on the quantum computer science landscape painting and go the agency to fresh frontiers of prognostic analytics in new digital worlds.
Neural Networks and Applications
Blockchain Technology Applications and Security
Advancements in Semiconductor Devices and Circuit Design
The rapid evolution of quantum computing poses significant threats to traditional cryptographic schemes, particularly in Decentralized Finance (DeFi) systems that rely on legacy mechanisms like RSA and ECDSA for digital ident... | Find, read and cite all the research you need on Tech Science Press
Open access
Physical Unclonable Functions (PUFs) and Hardware Security
Advancements in Semiconductor Devices and Circuit Design
Ozan Solmaz, Lioba Heimbach, Yann Vonlanthen, Roger Wattenhofer
Layer 2 rollups are rapidly absorbing DeFi activity, securing over $40 billion and accounting for nearly half of Ethereum's DEX volume by Q1 2025, yet their MEV dynamics remain understudied. We address this gap by defining and quantifying optimistic MEV, a form of speculative, on-chain MEV whose detection and execution logic reside largely on-chain in smart contracts. As a result of their speculative nature and lack of off-chain opportunity verification, optimistic MEV transactions frequently decide not to execute any trades. In this work, we focus on cyclic arbitrage, which we find is predominantly executed as optimistic MEV on Layer 2s. Using our multi-stage identification pipeline on Arbitrum, Base, and Optimism, we show that in Q1 2025, transactions from cyclic arbitrage contracts account for over 50% of on-chain gas on Base and Optimism and 7% on Arbitrum, driven mainly by "interaction" probes (on-chain computations searching for arbitrage). This speculative probing indicates that cyclic arbitrage on Layer 2s is predominantly executed as optimistic MEV and contributes to generally keeping blocks on Base and Optimism persistently full. Despite consuming over half of on-chain gas, these optimistic MEV transactions pay less than one quarter of total gas fees. Cross-network comparison reveals divergent success rates, differing patterns of code reuse, and sensitivity to varying sequencer ordering and block production times. Finally, OLS regressions link optimistic MEV trade count to ETH volatility, retail trading activity, and DEX aggregator usage. Together, these findings show that optimistic MEV has become a major source of persistent spam-like transaction activity on Layer 2s, dominating blockspace with low-value probes and reshaping the composition of on-chain activity.
Gabriel FernĂĄndez-Blanco, IvĂĄn Froiz-MĂguez, Paula FragaâLamas, Tiago M. FernĂĄndezâCaramĂŠs
This paper describes a lightweight proof-of-concept that tackles the problem of academic certificate forgery with the use of a smart contract deployed in the Ethereum blockchain. The implemented application allows to request, update, download and verify students Academic Records (AR) easily. These ARs are backed up by a decentralized storage system based on InterPlanetary File System (IPFS). The ARs modifications are secured and tamper-proof, since they need to be approved by the network. Furthermore, this proof-of-concept was conceived to support future functionalities such as the verification of Curriculum Vitae (CV) merits, so its architecture could be the basis of many other types of decentralized applications. Not only was the application tested in terms of energy efficiency and performance, but it was also deployed on Single-Board Computers (SBCs) to evaluate its performance in an IoT network.
Open access
Advancements in Semiconductor Devices and Circuit Design
Cryptocurrency mining processes always lead to a high energy consumption at considerably high production cost, which is nearly one-third of cryptocurrency (e.g. Bitcoin) price itself. As the core of mining process is based on SHA-256 cryptographic hashing function, by using the alternative quantum computers, hybrid quantum computers or more larger quantum computing devices like quantum annealers, it would be possible to reduce the mining energy consumption with a quantum hardware's low-energy-operation characteristics. Within this work we demonstrated the use of optimized quantum mining facilities which would replace the classical SHA-256 and high energy consuming classical hardware in near future.
Jieyu Li, Weifeng He, Bo Zhang, Guanghui He ¡ 7 authors
This article presents a timing slack inference and clock frequency adaption technique, named TICA, to mitigate the large and pessimistic timing guardband reserved for process, voltage, and temperature (PVT) variations in deeply pipelined ultra-low-voltage (ULV) circuits. TICA can perceive the dynamic PVT variations of a circuit with in situ cycle borrowing detectors, then infer its runtime timing slack, and adjust the clock frequency accordingly to minimize the redundant timing margin timely. Therefore, with TICA, a circuit can maintain a small amount of positive timing slack, free from the costly timing error correction process required in conventional in situ timing error detection and correction (EDAC)-based circuits. For error-tolerant applications, TICA can also keep the circuitâs timing slack at a small negative level for further energy efficiency and throughput improvements. Moreover, an inference-accuracy-driven in situ cycle borrowing detector insertion method is presented, which greatly reduces the insertion rate and the associated timing error detection overheads by leveraging the monotonic relationship between the timing slack and the number of cycle borrowing events. We implement TICA in a near-threshold-voltage (NTV) bitcoin mining core featuring a 64-stage deeply pipelined SHA256 engine in a 28-nm process, with only 0.59% in situ detector insertion rate and 1.4% area overhead. Silicon measurements show$4.2\times $throughput improvements or 19.3% energy savings without any timing error compared to the baseline margined for a 10%$V_{\mathrm {DD}}$drop, as well as additional 35.7% throughput gains or 10.6% energy savings at 0.3 V when maintaining the error rate of SHA256 computing results at 1%.
Low-power high-performance VLSI design
Semiconductor materials and devices
Advancements in Semiconductor Devices and Circuit Design
SolSec Labs is a web-based application that provides interactive training labs for blockchain developers, especially students eager to learn more about smart contract security to gain practical knowledge ( <xref ref-type="fig" rid="fig1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Fig. 1</xref> ). It teaches solidity and smart contract security skills through hands-on experience. The easy-to-understand environment enables students and early developers to immediately apply newly learned secure coding practices to their ongoing projects. Currently, it consists of a total of 10 labs crafted using examples taken from the most severe real-world vulnerabilities. Every lab teaches developers about the related vulnerability; exploitation methods; preventive and remediation measures; and, finally, a step-by-step list of lab tasks to perform to secure the presented vulnerable code.
Smart Grid Security and Resilience
Security and Verification in Computing
Advancements in Semiconductor Devices and Circuit Design
Jieyu Li, Weifeng He, Bo Zhang, Guanghui He ¡ 6 authors
Energy-efficient bitcoin mining cores have gained significant attention since the energy cost for computing dominates the mining expenses [1]. Ultra-low-voltage (ULV) digital circuits have emerged as an attractive approach to improve the energy-efficiency. However, they demand a large timing margin for the worst-case process, voltage, and temperature (PVT) variations, undermining a significant portion of energy savings. Recent works, including multi-phase latch pipeline [1], tunable replica circuits [2]â[3], in-situ error detection and correction (EDAC) [4]â[6], and dynamic timing enhancement [7], can reduce the pessimistic margin. However, it is not straightforward to adopt those techniques in mining cores due to their deeply-pipelined architecture (up to 128 stages [1]). For example, to adopt EDAC, the deep pipeline requires inserting many bulky error detectors as it has many critical paths. Our experiment with a 0.3V 28-nm mining core shows >18.9% registers need to be replaced with error detectors, considering 6Ď local process variation only. Also, multiple stages can have timing errors simultaneously, making an error correction process (e.g., clock gating [5], VDD boosting [6]) complex and costly.
Low-power high-performance VLSI design
Semiconductor materials and devices
Advancements in Semiconductor Devices and Circuit Design
Over the past few years, massive cyberattacks have dominated the public imagination. Most \nAmericans have been directly affected by data breaches and an overwhelming majority believe \nthat they are no longer in control of their data. At the same time, there are important applications in \nwhich the aggregation of private data is unavoidable. Not surprisingly, there has been considerable \ninterest in developing protocols for secure multi-party computation (MPC), i.e., N parties providing \nprivate inputs to jointly compute some function f. Recent developments in MPC have led to leaps \nin efficiency and MPC is quickly becoming a practical approach for privacy-centric distributed \napplications. As MPC applications become deployed, guaranteeing the security of these protocols, \neven when interacting with other applications, is essential. The standard approach to showing \nsecurity of MPC protocols under arbitrary composition is through the universal composability (UC) \nframework. There has been much prior work on this topic; however, most previous work either \nmakes synchronicity assumptions or does not guarantee output delivery in the presence of even \none fault. For practical MPC applications, though, dealing with asynchronicity and robustness is \nessential. In this thesis, we describe two new keywords, eventually and leak, that aid in defining \nprotocols in the asynchronous world and define wrappers that implement these within the UC \nframework. We then use this novel wrapper to give a UC-realization of a reliable broadcast primitive, by means of Brachaâs classic protocol. Finally, we define and prove a realization of what we call the \nsmart contract model of MPC, which serves as a UC-idealization of asynchronous, robust MPC.
Open access
Advancements in Semiconductor Devices and Circuit Design
It is crucial that smart contracts are tested thoroughly due to their immutable nature. Even small bugs in smart contracts can lead to huge monetary losses. However, testing is not enough; it is also important to ensure the quality and completeness of the tests. There are already several approaches that tackle this challenge with mutation testing, but their effectiveness is questionable since they only considered small contract samples. Hence, we evaluate the quality of smart contract mutation testing at scale. We choose the most promising of the existing (smart contract specific) mutation operators, analyse their effectiveness in terms of killability and highlight severe vulnerabilities that can be injected with the mutations. Moreover, we improve the existing mutation methods by introducing a novel killing condition that is able to detect a deviation in the gas consumption, i.e., in the monetary value that is required to perform transactions. This paper has a replication package at https://github.com/pieterhartel/Mutation-at-scale
Bitcoin is the most popular cryptocurrency today. A bedrock of the Bitcoin framework is mining, a computation intensive process that is used to verify Bitcoin transactions for profit. We observe that mining is inherently error tolerant due to its embarrassingly parallel and probabilistic nature. We exploit this inherent tolerance to inaccuracy by proposing approximate mining circuits that trade off reliability with area and delay. These circuits can then be operated at Better Than Worst-Case (BTWC) to enable further gains. Our results show that approximation has the potential to increase mining profits by 30%.
Low-power high-performance VLSI design
Advancements in Semiconductor Devices and Circuit Design
Recently, the Bitcoin cryptocurrency has been an international sensation. This paper tells the story of Bitcoin hard-ware: how a group of early-adopters self-organized and financed the creation of an entire new industry, leading to the development of machines, including ASICs, that had orders of magnitude better performance than what Dell, Intel, NVidia, AMD or Xilinx could provide. We examine this story for clues as to how we can foster greater innovation in the semiconductor industry and enable this phenomenon to occur more broadly for more application areas, spawning a new age of hardware innovation tailored to emerging application domains-an Age of Bespoke Silicon.
2 source records
Advancements in Semiconductor Devices and Circuit Design
Advanced Memory and Neural Computing
Physical Unclonable Functions (PUFs) and Hardware Security