Finite-Frame Transfer Compatibility: Exact Spectral-Mixing Residuals under Known Circular LTI Transfer Finite spectral estimation and known linear transfer do not generally commute. This work shows that the resulting spectral discrepancy is not merely an uncontrolled finite-window artifact: under a known circular LTI transfer and an exact all-origin finite-frame mixing kernel, the compatibility residual is analytically defined and quantitatively computable without fitted calibration. For an input power spectrum S, a nonnegative finite-frame mixing operator K, and power transfer a=∣H∣2, the fitted log-frequency slope of the compatibility defect is exactly the residual between ideal transfer slope and observed spectral-slope migration on a fixed frequency mask. Its pointwise depth curvature is also determined by a variance of log transfer gain under a depth-tilted spectral measure. The frozen benchmark contains 64 synthetic records and 65 nonoverlapping real-data blocks from electrocardiography, Bitcoin minute returns, and solar-wind magnetic-field data. Across 3483 retained cells, pooled R2 for ΔR4=R4−R3 ranges from 0.9891 to 0.9994 across the nine real dataset–estimator groups. After removing fixed-configuration means, R2 remains 0.6608–0.9943; across 81 fixed real configurations, the median R2 is 0.8782. The record includes the manuscript, frozen data, executed publication run, source code, dependency specification, provenance and licensing documentation, and SHA-256 manifests required to reproduce and audit the reported results. Reproducibility DOI: 10.5281/zenodo.22056027Corresponding author: gmtheory@outlook.fr Licensing is file- and source-specific. See DATA_LICENSES_AND_ATTRIBUTION.md for upstream licenses, attribution requirements, and provenance of the redistributed data.
Compact AI systems make local language-model experimentation increasingly accessible, yet practical evidence for multi-node training on desktop-class accelerators remains limited. This report presents a proof-of-concept deployment of distributed NanoChat pretraining across two NVIDIA DGX Spark systems, each with a GB10 Grace Blackwell system-on-chip and 128 GB of unified memory, administered remotely over a Tailscale mesh VPN and connected for training by a dedicated 200 Gb/s QSFP56 direct fiber link. PyTorch torchrun, DDP, and NCCL were configured with one process per node, a depth-20 NanoChat model, a local batch size of 32 per node, and a 2,048-token context, giving a global batch of 131,072 tokens per step. The run sustained a step time of about 69.4 s (about 1,890 tokens/s), processing about 653 million tokens over four days. We document link configuration, container setup, interface binding, a step-zero evaluation bug that triggered NCCL timeouts, checkpointing, and troubleshooting lessons, as a reproducibility reference for small labs. We also built a cybersecurity fine-tuning dataset from 77 CISA advisories (338 training, 37 validation conversations) and ran a 17-question held-out evaluation comparing a baseline SFT checkpoint against a CTI-augmented checkpoint with an Ollama-hosted LLM judge. CTI-specific categories improved while general-knowledge categories regressed, for a small overall change from 2.06 to 2.29 on a 0-10 scale. The same cluster supports a 400-level AI course (CS 426) and a query engine for CompTIA Security+ POGIL activities in CBS 255, showing modest local infrastructure can serve both research and teaching. The study establishes feasibility rather than a scaling-efficiency claim, since single-node throughput used for comparison was estimated, not measured under matched conditions. Runbook and scripts are available (see Code Availability).
Zero-knowledge virtual machines (zkVMs) are a key technology for driving the large-scale adoption of zero-knowledge proofs (ZKP), but their performance bottlenecks severely limit their practicality. While current hardware acceleration research has exclusively focused on backend proving, we identify that the frontend execution and trace generation phase is rapidly emerging as the new system bottleneck. To address this challenge, we propose ZK-Tracer, the first hardware accelerator architecture specifically designed for the zkVM frontend. ZK-Tracer features a novel heterogeneous design comprising a Main Trace Unit and parallel Permutation Trace Units. It exposes a fine-grained interface to the host software through a lightweight instruction set extension, enabling efficient task offloading. Our ASIC implementation results demonstrate that ZK-Tracer achieves up to 1829x speedup in trace generation over a high-performance multi-core CPU. When integrated with existing backend proving accelerators, it delivers a remarkable 963x end-to-end performance improvement for the entire ZKP system.
Abstract Multi-Scalar Multiplication (MSM) is the primary computational bottleneck in zero-knowledge (ZK) proof generation for decentralized networks. This research accelerates MSM by solving the memory bandwidth constraints inherent in high-dimensional elliptic curve cryptography. We introduce Modular Hypercube Chunking, a novel microarchitectural approach that partitions high-dimensional algebraic precomputations into smaller, orthogonal blocks. Specifically, we divide a 12-dimensional workload into three separate 4D hypercubes, restricting the entire memory footprint to 31.1 KB. This geometric partitioning ensures perfect residency within the ultra-fast L1 cache of modern processors. By employing shared doubling across these blocks, the algorithm processes twelve scalars simultaneously with a single elliptic curve duplication, bypassing slow RAM access entirely. Empirical evaluations conducted on an ARM Snapdragon 8 Gen 2 mobile processor demonstrate a peak 5.37× speedup compared to optimized sequential baselines, reducing the computational cost to 18.44 microseconds per scalar. These findings prove that geometric data partitioning within strict L1 cache boundaries significantly outperforms traditional arithmetic-heavy optimizations. The implications of this work provide a highly scalable architecture capable of executing server-grade ZK-Rollup proof generation on resource-constrained edge devices, while establishing a highly efficient blueprint for future multicore hardware accelerators. Furthermore, initial stress-tests of a 12D monolithic architecture (68 MB footprint) yielded an anomalous 8.88× peak speedup. This finding reveals a novel sparse-access memory optimization path, which we introduce as an open architectural challenge.
Este artigo analisa estratégias de otimização de gas em Ethereum a partir de duas dimensões principais: o custo dos opcodes da EVM e as escolhas de estruturas de dados em Solidity. A tabela de opcodes da EVM e a evolução do gas schedule mostram que operações de armazenamento e acesso externo, como SSTORE, SLOAD, CALL, BALANCE e EXT*, estão entre as mais caras, especialmente após EIPs como a 2929, que aumentaram o custo de acessos “frios” a contas e slots de storage para refletir melhor seu impacto na execução e na camada de armazenamento. Estudos recentes sobre custos de armazenamento evidenciam que uma escrita em SSTORE pode custar cerca de 22.100 gas para 32 bytes (aprox. 690 gas/byte), enquanto leituras via SLOAD também são significativamente caras, motivando pesquisas sobre técnicas como SSTORE2 e mecanismos para corrigir “overcharge” em leitura/escrita de storage, com ganhos médios de até 30–32% em fees para certos padrões de uso. Boas práticas de otimização de gas em Solidity incluem reduzir o número de acessos a storage movendo valores frequentemente lidos para variáveis em memória, empacotar variáveis em slots de 32 bytes (storage packing), preferir tipos fixos a dinâmicos quando possível, evitar cópias desnecessárias de arrays de storage para memória e desenhar estruturas de dados que minimizem gravações em storage. A literatura e guias de otimização indicam que a escolha entre arrays, mappings, structs e padrões de layout impacta diretamente o custo de execução, especialmente em loops que interagem com storage ou estruturas dinâmicas. Conclui‑se que a otimização de gas em Ethereum é um problema tanto de engenharia de baixo nível, ligado ao custo de opcodes e ao modelo warm/cold de acessos, quanto de design de dados e algoritmos, com implicações econômicas diretas para usuários, protocolos DeFi e estratégias de design de L2s.<br>
Highlights • Identifying threats that cannot be countered by theoretical security based on STRIDE threat analysis of an existing provable data possession (PDP) system • Designing a PDP system with practical security features to counter threats that cannot be addressed with theoretical security alone • Presenting the implementation of the proposed PDP system, PRISM, which is also provided as an open-source software • Validating security properties through property-based fuzz testing with 10,000 randomized test runs per security property • Demonstrating PRISM’s key strengths through comprehensive experiments, including basic performance, trade-offs between processing time and data auditing efficiency, and capabilities for detecting data anomalies Digital platforms are increasingly recognized as a cornerstone for advanced virtual spaces such as smart cities and the metaverse, where vast amounts of data are aggregated, analyzed, and utilized to make critical decisions. These platforms rely on data fusion to integrate diverse sources of information, encompassing individual behavior, urban dynamics, and system states. Through auditing against data tampering, loss, and substitution, enabling the detection of such threats is critical to building a highly reliable system. This paper introduces PRISM (Provable and Immutable Storage Mechanism), an Ethereum-based Provable Data Possession (PDP) system designed to integrate data reliability and security with decentralized auditing. PDP, a cryptographic protocol that enables data integrity in untrusted cloud storage, has seen extensive research focusing on theoretical security and computational efficiency. PRISM extends this foundation by addressing practical security concerns, including the integration of authentication and authorization, data immutability, data uniqueness, data freshness, and state management, to ensure a robust system implementation. Experiments on processing costs and parameter analysis reveal a trade-off between the costs and detection accuracy and demonstrate that PRISM provides efficient data auditing.
Abstract Polynomial multiplication serves as a fundamental computational primitivein modern cryptography—including fully homomorphic encryption and zero-knowledge proofs —as well as in digital signal processing. Its performanceoptimization has become increasingly critical amid the rapid development ofprivacy-preserving computation and blockchain technologies. To address the lim-itations of traditional algorithms in meeting the demands for high throughputand low latency, this study proposes a high-performance polynomial multiplica-tion accelerator based on the collaborative optimization of GPU-NTT and theKaratsuba algorithm. The method deeply integrates the asymptotically optimalcomplexity of NTT with the constant-factor efficiency of Karatsuba at moderatescales, and fully exploits the parallel computing power of GPUs to construct amodular, multi-stage pipelined acceleration framework. The divide-and-conquernature of the Karatsuba algorithm is leveraged for coarse-grained parallelism,splitting large polynomial multiplications into subproblems handled by GPUthread blocks in parallel, while each subproblem is solved with fine-grained paral-lelism using GPU-accelerated NTT kernels. An innovative zero-padding strategyis introduced to enhance the generality of the NTT kernels, and shared memorycaching is employed to alleviate GPU memory bandwidth bottlenecks. Experi-mental results on the NVIDIA RTX 4060 GPU demonstrate that the proposedmethod achieves a stable speedup of 1.43× to 1.49× over the baseline GPU-NTT for lower-dimensional polynomials, and outperforms the KNTT algorithmby up to 2.44× for higher dimensions (e.g., log2 n = 14), showing superior scal-ability and robustness. Kernel execution time analysis further confirms that themethod benefits from efficient kernel fusion and balanced workload distribution,which effectively avoids pipeline stalls and ensures high-throughput execution.This research provides a significant performance optimization solution for thepractical deployment of advanced cryptographic technologies such as FHE andZKP.
Decentralized finance (DeFi) is an emerging financial service on blockchain, enabling automatic and anonymous transactions.Within DeFi, decentralized exchanges (DEXs) maintain reserves of a pair of tokens and determine the exchange rate to swap tokens.However, DEXs also create opportunities for Maximal Extractable Value (MEV), where attackers include, exclude, or reorder DEX transactions to exploit price discrepancies of tokens and extract profit.Uncovering MEV opportunities requires high throughput, as the 12-second block interval and the vast search space impose strict time constraints.However, existing tools suffer from low throughput, as they rely on CPU-bound execution, which is hindered by frequent state forking and slow DEX execution.In this paper, we take the first step in leveraging GPU parallel computing power to boost MEV-search throughput in arbitrage and sandwich strategies.More precisely, we compile an MEV bot into a GPU application and then launch thousands of GPU threads to search for profit in parallel.To this end, we design new solutions to address three major challenges: designing cheatcodes to simulate transactions on GPU, proposing a memory manager to reduce GPU memory usage, and designing strategyaware mutations to improve input diversity.We implement a prototype named MeVisor that runs DEXs on GPUs and searches for MEV using a parallel genetic algorithm.Evaluated on 3,941 real MEV cases from Ethereum, MeVisor achieves 3.3M-5.1Mtransactions per second, outperforming the CPU baseline by 100,000x.In a large-scale study of Q1 2025 data, MeVisor estimates MEV opportunities ranging from 2 to 14 transactions, yielding at most $1.1 million in MEV profit.
The Ethereum Virtual Machine (EVM) is a stack-based virtual processor that executes smart contract bytecode sequentially. While this design ensures determinism and correctness, it inherently limits instruction throughput. This paper presents a feasibility study of instruction-level pipelining within the EVM interpreter architecture. By analyzing the internal execution flow of the EVM as implemented in the Go-Ethereum (geth) client, the study identifies the program counter dependency, particularly under jump instructions, as the principal control hazard preventing naïve pipelining. A two-stage pipelined execution model is proposed, separating opcode fetch and decode from execution and program counter update, with a feedback mechanism to preserve EVM semantics. The work focuses on architectural feasibility rather than performance evaluation and optimization, demonstrating that pipelining inside the EVM interpreter is conceptually possible under controlled synchronization. Limitations, design challenges, and future research directions are discussed.
Zero-Knowledge Proofs (ZKP) and Homomorphic Encryption (HE) are crucial for data privacy in applications like cloud, blockchain, and analytics. However, the real-world adoption often faces performance challenges, particularly in the execution of the Number Theoretic Transform (NTT) required for polynomial multiplication involving sizes beyond \(2^{20}\) and large integer widths (e.g., 256 bits). FPGAs offer a promising platform for acceleration, but efficiently implementing large-size NTTs remains difficult due to the limited on-chip resources. The widely adopted four-step NTT method, used to relieve the need for large on-chip memory, introduces performance bottlenecks. Initially, the traditional dataflow NTT architecture may not fully exploit available compute capability, which hinders achieving peak performance. Furthermore, during the matrix transpose phase, the non-sequential access to external High-Bandwidth Memory (HBM) causes inefficiency. To address these challenges, we introduce HiFA, an FPGA-based automatic accelerator framework designed for high-performance and flexible large-size NTT computations. HiFA utilizes a stacked NTT architecture for high parallelism, maximizing HBM throughput. It supports various decomposed polynomial sizes via a novel reordering module. Additionally, a specialized cyclic shuffle module is integrated to optimize data movement during the matrix transpose step, alleviating random memory access delay. HiFA also provides an automatic Design Space Exploration (DSE) framework that identifies optimal four-step decomposition parameters and generates corresponding hardware configurations. Our experiments show that the FPGA implementation of HiFA achieves an average speedup of 2.97× and up to 7.25× improvement in latency over prior state-of-the-art FPGA solutions. Compared to prior GPU-based methods, HiFA achieves an average energy efficiency gain of 2.24×.
Zero-Knowledge Proofs (ZKP) are protocols which construct cryptographic proofs to demonstrate knowledge of a secret input in a computation without revealing any information about the secret. ZKPs enable novel applications in private and verifiable computing such as anonymized cryptocurrencies and blockchain scaling and have seen adoption in several real-world systems. Prior work has accelerated ZKPs on GPUs by leveraging the inherent parallelism in core computation kernels like Multi-Scalar Multiplication (MSM). However, we find that a systematic characterization of execution bottlenecks in ZKPs, as well as their scalability on modern GPU architectures, is missing in the literature. This paper presents ZKProphet, a comprehensive performance study of Zero-Knowledge Proofs on GPUs. Following massive speedups of MSM, we find that ZKPs are bottlenecked by kernels like Number-Theoretic Transform (NTT), as they account for up to 90% of the proof generation latency on GPUs when paired with optimized MSM implementations. Available NTT implementations under-utilize GPU compute resources and often do not employ architectural features like asynchronous compute and memory operations. We observe that the arithmetic operations underlying ZKPs execute exclusively on the GPU's 32-bit integer pipeline and exhibit limited instruction-level parallelism due to data dependencies. Their performance is thus limited by the available integer compute units. While one way to scale the performance of ZKPs is adding more compute units, we discuss how runtime parameter tuning for optimizations like precomputed inputs and alternative data representations can extract additional speedup. With this work, we provide the ZKP community a roadmap to scale performance on GPUs and construct definitive GPU-accelerated ZKPs for their application requirements and available hardware resources.
Zero-Knowledge Proofs (ZKPs) have emerged as a powerful tool for secure and privacy-preserving computation. ZKPs enable one party to convince another of a statement's validity without revealing anything else. This capability has profound implications in many domains, including machine learning, blockchain, image authentication, and electronic voting. Despite their potential, ZKPs have seen limited deployment because of their exceptionally high computational overhead, which manifests primarily during proof generation. To mitigate these overheads, a (growing) body of researchers has proposed hardware accelerators and GPU implementations of both kernels and complete protocols. Prior art spans a wide variety of ZKP schemes that vary significantly in computational overhead, proof size, verifier cost, protocol setup, and trust. The latest and widely used ZKP protocols are intentionally designed to balance these trade-offs. One particular challenge in modern ZKP systems is supporting complex, high-degree gates using the SumCheck protocol. We address this challenge with a novel programmable accelerator to efficiently handle arbitrary custom gates via SumCheck. Our accelerator achieves upwards of $1000\times$ geomean speedup over CPU-based SumChecks across a range of gate types. We include this unit in zkPHIRE, a programmable, full-system accelerator that accelerates the HyperPlonk protocol. zkPHIRE achieves $1486\times$ geomean speedup over CPU and $11.87\times$ geomean speedup over the state-of-the-art at iso-area. Together, these results demonstrate compelling performance while scaling to large problem sizes (upwards of $2^{30}$ constraints) and maintaining small proof sizes ($4-5$ KB).
Abstract Pixel-Web3 Wallet is a hierarchical deterministic (HD) wallet designed for secure and decentralized asset management across multiple blockchain networks, including Ethereum and Solana. Unlike traditional wallets that depend on browser extensions or centralized servers, Pixel offers a web-based solution with user-controlled security through locally stored seed phrases. This paper explores the wallet’s architecture, security framework, and innovative features, such as real-time balance updates and flexible recovery options. Additionally, the research evaluates the scalability of Pixel and its potential expansion to support more blockchain networks. By eliminating reliance on third-party services, Pixel enhances accessibility while maintaining strong security, making it a promising solution for blockchain enthusiasts, traders, and developers. Keywords: Blockchain, HD Wallet, Cryptocurrency,Web3,Ethereum,Solana, Security
Atefeh Zareh Chahoki, Maurice Herlihy, Marco Roveri
Conthereum is a concurrent Ethereum solution for intra-block parallel transaction execution, enabling validators to utilize multi-core infrastructure and transform the sequential execution model of Ethereum into a parallel one. This shift significantly increases throughput and transactions per second (TPS), while ensuring conflict-free execution in both proposer and attestor modes and preserving execution order consistency in the attestor. At the heart of Conthereum is a novel, lightweight, high-performance scheduler inspired by the Flexible Job Shop Scheduling Problem (FJSS). We propose a custom greedy heuristic algorithm, along with its efficient implementation, that solves this formulation effectively and decisively outperforms existing scheduling methods in finding suboptimal solutions that satisfy the constraints, achieve minimal makespan, and maximize speedup in parallel execution. Additionally, Conthereum includes an offline phase that equips its real-time scheduler with a conflict analysis repository obtained through static analysis of smart contracts, identifying potentially conflicting functions using a pessimistic approach. Building on this novel scheduler and extensive conflict data, Conthereum outperforms existing concurrent intra-block solutions. Empirical evaluations show near-linear throughput gains with increasing computational power on standard 8-core machines. Although scalability deviates from linear with higher core counts and increased transaction conflicts, Conthereum still significantly improves upon the current sequential execution model and outperforms existing concurrent solutions under a wide range of conditions.
Modular arithmetic, particularly modular reduction, is widely used in cryptographic applications such as homomorphic encryption (HE) and zero-knowledge proofs (ZKP). High-bit-width operations are crucial for enhancing security; however, they are computationally intensive due to the large number of modular operations required. The lookup-table-based (LUT-based) approach, a ``space-for-time'' technique, reduces computational load by segmenting the input number into smaller bit groups, pre-computing modular reduction results for each segment, and storing these results in LUTs. While effective, this method incurs significant hardware overhead due to extensive LUT usage. In this paper, we introduce ALLMod, a novel approach that improves the area efficiency of LUT-based large-number modular reduction by employing hybrid workloads. Inspired by the iterative method, ALLMod splits the bit groups into two distinct workloads, achieving lower area costs without compromising throughput. We first develop a template to facilitate workload splitting and ensure balanced distribution. Then, we conduct design space exploration to evaluate the optimal timing for fusing workload results, enabling us to identify the most efficient design under specific constraints. Extensive evaluations show that ALLMod achieves up to $1.65\times$ and $3\times$ improvements in area efficiency over conventional LUT-based methods for bit-widths of $128$ and $8,192$, respectively.
Multi-scalar multiplication (MSM) is the primary building block in many pairing-based zero-knowledge proof (ZKP) systems. MSM at large scales has become the main bottleneck in ZKP implementations. Inspired by existing SIMD-accelerated work, we are focused on accelerating MSM computing efficiency using SIMD instructions in a single CPU environment. First, we propose a SIMD-accelerated MSM computing architecture with no write conflicts and constant memory overheads. This architecture utilizes multithreading to achieve task-level and loop-level parallelism and employs a three-tier buffer mechanism to maximize the utilization of the SIMD engine. Instanced with AVX512-IFMA instructions, we implement six SIMD elliptic curve arithmetic engines for different point addition in three coordinate systems and two groups. Moreover, we integrate our AVX-MSM implementation into the libsnark library, naming it AVX-ZK. In more detail, point deduplication and “Three-Stage” memory optimization are proposed to address problems existing in practical applications. Based on the RELIC library, our performance results on the BLS12-381 curve show that our AVX-MSM achieves up to 27.86x speedup over the most popular Pippenger algorithm. Compared with libsnark, our AVX-ZK implementation achieves over 11.53x (up to 20.26x) speedup under standard benchmarks.
Zero-knowledge proof (ZKP) is an important cryptographic tool that sees wide applications in real-world scenarios where privacy must be protected, including privacy-preserving blockchains and zero-knowledge machine learning. Existing ZKP acceleration approaches using GPUs, FPGAs, and ASICs focus only on classic protocols that rely on expensive elliptic curve arithmetics. Emerging ZKP protocols based on hash functions can greatly reduce the algorithmic complexity, but they also introduce much more diverse computation kernels that cannot be efficiently handled by a single accelerator chip if dedicated units for each kernel are used. Our approach is to leverage a unified hardware architecture that is able to efficiently support the common primitives in ZKP, and then use smart mapping strategies to flexibly map various kernels to such hardware while ensuring high resource utilization. We design UniZK as such a ZKP accelerator, with a systolic-array-based hardware architecture enhanced with extra local links and a new vector processing mode. We propose novel mapping strategies to support diverse kernels including number theoretic transforms, hash functions, and general polynomial computations. UniZK provides 97x and 46x speedups on average compared to the CPU and GPU implementations of the same protocols, and is also 840x faster than previous ZKP accelerators using different protocols.
This survey provides a comprehensive examination of verifiable computing, tracing its evolution from foundational complexity theory to modern zero-knowledge succinct non-interactive arguments of knowledge (ZK-SNARKs). We explore key developments in interactive proof systems, knowledge complexity, and the application of low-degree polynomials in error detection and verification protocols. The survey delves into essential mathematical frameworks such as the Cook-Levin Theorem, the sum-check protocol, and the GKR protocol, highlighting their roles in enhancing verification efficiency and soundness. By systematically addressing the limitations of traditional NP-based proof systems and then introducing advanced interactive proof mechanisms to overcome them, this work offers an accessible step-by-step introduction for newcomers while providing detailed mathematical analyses for researchers. Ultimately, we synthesize these concepts to elucidate the GKR protocol, which serves as a foundation for contemporary verifiable computing models. This survey not only reviews the historical and theoretical advancements in verifiable computing over the past three decades but also lays the groundwork for understanding recent innovations in the field.
Shahzad Ahmad Butt, Benjamin Reynolds, V. Ramamurthy, Xiao Xiao · 8 authors
Zero-Knowledge Proofs (ZKPs) have emerged as an important cryptographic technique allowing one party (prover) to prove the correctness of a statement to some other party (verifier) and nothing else. ZKPs give rise to user's privacy in many applications such as blockchains, digital voting, and machine learning. Traditionally, ZKPs suffered from poor scalability but recently, a sub-class of ZKPs known as Zero-knowledge Succinct Non-interactive ARgument of Knowledges (zk-SNARKs) have addressed this challenge. They are getting significant attention and are being implemented by many public libraries. In this paper, we present a novel scalable architecture that is suitable for accelerating the zk-SNARK prover compute on FPGAs. We focus on the multi-scalar multiplication (MSM) that accounts for the majority of computation time spent in zk-SNARK systems. The MSM calculations extensive rely on modular arithmetic so highly optimized Intel IP Libraries for modular arithmetic are used. The proposed architecture exploits the parallelism inherent to MSM and is implemented using the Intel OneAPI framework for FPGAs. Our implementation runs 110x-150x faster compared to reference software library, uses a generic curve form in Jacobian coordinates and is the first to report FPGA hardware acceleration results for BLS12-381 and BN128 family of elliptic curves.
Over the last few decades, a large body of research was carried out covering Byzantine Fault Tolerance (BFT) systems. This research has brought forward new techniques, including but not limited, for ordering operations (Abraham et al., 2018; Buchman, 2016; Guo et al., 2020; Bessani et al., 2014; Duan et al., 2018) and state transfer (Bessani et al., 2013; Distler, 2021 , Eischer et al., 2019 ), on networks that suffer from byzantine faults. More recently, the ongoing research on distributed ledgers re-ignited the interest on BFT, due to its high throughput when compared to other alternatives of byzantine consensus ( Vukolić, 2016 ). In this paper we present three contributions covering several aspects, including modular and extensible framework design and implementation, system optimization through development of better networking alternatives, a greater use of parallelism, several ordering protocol improvements and extensive comparative assessment of previous state-of-the-art approaches. First, we introduce Atlas, an open-source modular BFT framework that aims to support the research and development of highly efficient BFT protocols, by decoupling traditionally entangled sub-protocols, e.g., consensus primitive from the execution (Bessani et al., 2014), and deferment of log management to replicated services from state transfer. Atlas allows to further provide modules that can be re-used across different BFT approaches, such as deterministic and probabilistic/randomized models. Second, we present FeBFT, a new BFT implementation developed upon Atlas that combines pre-existing proven ideas from PBFTs, namely its 3-phase consensus and view-change protocol. This base approach is then extended with novel optimizations of the protocol, namely, multi-leader proposals (Stathakopoulou et al., 2019), multi-instance consensus execution (Stathakopoulou et al., 2022; Behl et al., 2015), and configurable batching solution that allow us to reduce the latency while improving throughput at the same time. Third, we offer a comprehensive evaluation amongst our work and other state-of-the-art BFT-SMR implementations, namely, Atlas ( Anon, 2024a ) with FeBFT (Official febft repository 2024), BFT-SMaRt (Bessani et al., 2014) and Themis (Rüsch et al., 2019). With these contributions, we aim to lay the ground work to: (i) improve reusability and hence productivity in BFT(-SMR) development; (ii) increase system safety, performance, scalability and reduce recovery time with the optimizations proposed; (iii) draw insights on the bottlenecks preventing order-of-magnitude improvements in BFT processing from a system’s perspective; and lastly, (iv) improve reproducibility between different BFT (sub-)protocols by allowing for true apples-to-apples comparisons. • Atlas, an open-source, modular BFT framework designed to support the efficient development of BFT protocols by separating traditionally intertwined sub-protocols and allowing for reusable modules across different BFT approaches. • FeBFT, introduces a novel BFT implementation leveraging the Atlas framework, which boosts protocol efficiency via multi-leader proposals and multi-instance consensus execution. It incorporates a batching solution designed to scale with network throughput, prioritizing this over network latency while maintaining the configurability to be tuned for low latency if needed. • Focusing on the essential need for reproducibility in scientific evaluation, Atlas provides a critical framework for accurate comparisons between different protocols. By offering a modular and reusable architecture, it significantly reduces the workload for system researchers in developing and testing implementations. This approach ensures a true apple-to-apple comparison, enabling a more precise and reliable assessment of protocol performance and efficacy. • And lastly, a comprehensive evaluation comparison with two well-known BFT-SMR (deterministic) implementations, namely, BTF-SMaRt and Themis, against FeBFT, our PBFT implementation that uses Atlas.
This paper presents a comprehensive analysis of storage proofs in the Ethereum ecosystem, examining their role in addressing historical and cross-chain state access challenges. We systematically review existing approaches to historical state verification, comparing Merkle Mountain Range (MMR) and Merkle-Patricia trie (MPT) architectures. An analysis involves their respective performance characteristics within zero-knowledge contexts, where performance challenges related to Keccak-256 are explored. The paper also examines the cross-chain verification, particularly focusing on the interactions between Ethereum and Layer 2 networks. Through careful analysis of storage proof patterns across different network configurations, we identify and formalize three architectures for cross-chain verification. By organizing this complex technical landscape, this analysis provides a structured framework for understanding storage proof implementations in the Ethereum ecosystem, offering insights into their practical applications and limitations.