An Efficient Barrett Modular Multiplier Design for Zero-Knowledge Proof

Abstract

Zero-Knowledge Proof (ZKP) has been widely applied in fields such as blockchain and privacy-preserving computing. However, the proof generation process remains computationally complex and time-consuming, which limits its further applications. Various schemes have been proposed to optimize the underlying modular operations with dedicated hardware support, but existing schemes still face low-efficiency problems. To address the problems, we propose an efficient Barrett modular multiplier design, especially for ZKP. Evaluation on a Xilinx XCVU9P FPGA shows that, compared to two existing pipelined designs, the proposed design improves throughput per slice by up to 20.4% and 49.6%, respectively, and achieves an $8.6 \times$ improvement over an existing non-pipelined design.